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ISO-9001 CERTIFIED BY DSCC
M.S.KENNEDY CORP. FEATURES:
65 Vpp Output Voltage 150 MHz Typical Bandwidth Transition Times Typically <3.0 nS Cost and Space Efficient Package Electrically Isolated Case Gain Fixed Internally
HIGH PERFORMANCE, HIGH VOLTAGE VIDEO DISPLAY DRIVER
645
(315) 701-6751
4707 Dey Road Liverpool, N.Y. 13088
MIL-PRF-38534 CERTIFIED
DESCRIPTION:
The MSK 645 is an amplifier designed specifically to suit the needs of todays high resolution CRT display monitors. With a typical bandwidth of 150 MHz and transition times typically under 3.0nS the MSK 645 can easily drive monitors with resolutions of up to 1280 x 1024. The output can swing up to 65 Vpp and gain is internally set to minimize external component count. The MSK 645(B) is available screened to MIL-PRF-38534 and comes in a space efficient package that is electrically isolated from the internal circuitry and can be attached directly to a heat sink for efficient thermal dissipation.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
CRT Driver for SVGA Display Driver for Systems with up to 1280 x 1024 Display Resolution High Voltage Fixed Gain Amplifier
1
PIN-OUT INFORMATION
1 2 3 4 5 Video Input Ground VBIAS Ground Video Output 6 7 8 9 Ground +VHV Ground Ground
Rev. D 10/05
ABSOLUTE MAXIMUM RATINGS

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-40C to +85C -55C to +125C
ELECTRICAL SPECIFICATIONS
Parameter STATIC CHARACTERISTICS Quiescent Current (VHV) Quiescent Current (+VBIAS) VHV Power Supply Range VBIAS Power Supply Range Video Input Voltage Thermal Resistance 2
Test Conditions
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Group A Subgroup
MSK 645(B) Min. Typ. Max. Min.
MSK 645 Units Typ. Max.
VIN=No Connect RL= VIN=No Connect RL=
1,2,3 1,2,3 -
20 4 0.5 -
0.6 0.01 60 5 0.85 26
2.0 0.5 80 10 1.2 30
20 4 0.4 -
0.6 0.01 60 5 0.85 26
2.0 0.5 80 10 1.3 32
VOUT=+50VDC Output Stage Junction to Case @ 125C
1,2,3 -
DYNAMIC CHARACTERISTICS High Level Video Output Voltage Video Gain Video Gain Flatness 2 6 Low Level F=1MHz;VOUT=+15Vto+45V F=10Hz to 60MHz;VOUT=30VPP VOUT=+15Vto+45V VOUT=10VPP VINTR=10nS 4 4 4 4 4 50 45 100 59 5 62 10 80 50 45 100 59 5 60 10 80 V V V/V dB nS % MHz
1.0 2.0 3.0 150 4.0 10 -
1.0 3.0 3.0 150 5.0 12 -
Video Output Rise/Fall Time Video Output Overshoot Bandwidth -3dB 2 2
NOTES:
1 +VHV=60V; +VBIAS=5V; RL=10K; unless otherwise specified. 2 Parameter is guaranteed by design but not tested. Typical specifications are representative of actual device performance at 25C but are for reference only. 3 Military grade devices ('B' suffix) shall be 100% tested to subgroups 1,2,3 and 4. 4 Subgroup 5 and 6 testing available upon request. TA=TC=+25C 5 Subgroup 1,4 Subgroup 2,5 TA=TC=+125C Subgroup 3,6 TA=TC=-55C 6 Refer to the video clip point curve on the Typical Performance Curves page. 7 Continuous operation at or above absolute maximum ratings may adversely effect the device performance and/or life cycle.
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Rev. D 10/05

+VHV +VIN +VBIAS IOUT
High Voltage Supply Input Voltage Bias Input Voltage Peak Output Current
+80V 5V +10V 200mA
TST Storage Temperature Range TLD Lead Temperature Range (Solder 10 Seconds) TJ Junction Temperature TC Case Operating Temperature MSK645 MSK645(B)
-65C to +150C +300C +175C
mA mA V V V C/W
APPLICATION NOTES BLACK LEVEL CONTROL
Unlike many currently available video amplifiers, the MSK 645 is a D.C. coupled device. D.C. coupling affords the user direct black level control. A video input voltage of approximately 0.85 volts will set the output voltage to 50VDC (black level for +VHV=60VDC). Black level control grants the user flexibility in the application of the amplifier. For example, the user could apply a 0.85VDC level to the video input to bias the output at the black level (approximately 50V for VHV=60V) and have input video information swing from 0.85 to 1.5V causing the output to swing from the black level towards white (zero). This configuration would dissipate the least amount of power and is most common. Another possible circuit configuration could be to D.C. bias the video input pin so that the output is at 1/2VHV. The output video signal could then swing linearly from (+VHV-10V) to (ground + 10V). Careful consideration must be paid to device power dissipation in this configuration since it will be very high.
OUTPUT PROTECTION
High voltage arcing can occur in the CRT being driven and cause severe damage to the MSK 645 output unless certain precautions are taken. The clamp diodes D1 and D2 (see figure 1) will keep the voltage at the output at a safe level. These diodes should have a low series resistance and shunt capacitance as well as a high surge rating (FDH400 is recommended). In the event of an arcover, Rb limits the current flowing through the clamp diode and Ra limits the current into the MSK 645 output. The recommended values shown in figure 1 should not be deviated from without checking the monitor performance since increasing these values will adversely affect transistion times.
POWER DISSIPATION
The most efficient method to reduce device power dissipation when using the MSK 645 is to fix the black level at a point as close to +VHV as possible and maintain the peak to peak video output voltage to as small an excursion as possible. The case of the MSK 645 is electrically isolated from internal circuitry and therefore the user should attach the heat sink directly to the case of the device.
VBIAS INPUT
The VBIAS pin is connected to the base of the cascode transistor in the equivalent schematic. The purpose of the cascode transistor is to isolate the input transistor from the high voltage supply. The input transistor must have a very high transition frequency specification and this is difficult to find in high voltage transistors. By using the cascode transistor to relieve the input transistor of its high BVceo requirement, high speed, low breakdown transistors can be used. The voltage applied to pin three minus a base to emitter voltage drop of approximately 0.6 volts is the voltage present at the collector of the input transistor that acts as the voltage to current convertor. The voltage applied to the VBIAS pin has a practical upper limit of 10.0 volts. Above 10.0 volts the device may not be able to reach white level without going into cutoff. The practical lower limit for this pin is approximately 2.0 volts. Below 2.0 volts the input transistor will be dangerously close to cutoff. The MSK 645 functions best with VBIAS set to 5.0 volts 1.0 volt.
HEAT SINK SELECTION
To calculate what size heat sink is needed for a particular application, the following formula must be used: Tj = Pd (Rjc + Rsa) + Ta where: Tj=junction temperature = 150C max. Rjc=30C/W max. Ta is the ambient temperature and Pd is the device power dissipation. Rsa is the heat sink thermal resistance. EXAMPLE: In an application an MSK 645 is dissipating 4 watts of power and the ambient temperature is +25C. Plugging in all the known variables and rearranging the equation it can be seen that: Rsa = ((150C - 25C)/4W) - 30C/W = 1.2C/W A heat sink with a thermal resistance of no more than 1.2C/W must be used to maintain a junction temperature of 150C max.
OUTPUT CONSIDERATIONS
The output of the MSK 645 is driven by a complimentary push-pull buffer. The output stage isolates the capacitive load from the amplifier thereby making rising and falling edges relatively load independent. The bandwidth of the MSK 645 is limited by the RC time constant made up of the resistance from +VHV to the base of the NPN buffer and the capacitance from the NPN buffer base to ground. The coils in the equivalent schematic are chosen at the factory to moderately peak the amplifiers response (10%). For application specific user adjustable peaking, see the Typical Connection Circuit page.
POWER SUPPLY DECOUPLING
Both the +VHV and the VBIAS input pins are decoupled internally with 0.1F capacitors to contain line noise. However it is good practice to decouple the MSK 645 externally with at least a 4.7F electrolytic capacitor placed as close as possible to the associated device pins.
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Rev. D 10/05
TYPICAL PERFORMANCE CURVES
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Rev. D 10/05
TYPICAL CONNECTION CIRCUIT
Transition time and overshoot adjustment is made possible using the circuit of Figure 1. LA peaks the amplifiers frequency response at the cathode yielding optimum rise and fall times. A good starting point value for this inductor is 0.1H. The tradeoff that must be dealt with when peaking an amplifiers' response is increased overshoot. Once the rise and fall times have been adjusted with LA, the overshoot can be damped by adjusting CA, RD1 and RD2 in Figure 1. Keep in mind that as the value of load capacitance increases, so will the overshoot. Starting with 499 resistors for RD1 and RD2 and 150pF for CA, the overshoot can be minimized by adjusting RD1 and RD2 up or down.
NOTES:
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Rev. D 10/05
MECHANICAL SPECIFICATIONS
ESD Triangle indicates Pin 1 ALL DIMENSIONS ARE 0.010 INCHES UNLESS OTHERWISE LABELED
ORDERING INFORMATION
Part Number MSK645 MSK645B Screening Level Industrial Mil-PRF-38534 CLASS H
M.S. Kennedy Corp.
4707 Dey Road, Liverpool, New York 13088 Phone (315) 701-6751 FAX (315) 701-6752 www.mskennedy.com
The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make changes to its products or specifications without notice, however, and assumes no liability for the use of its products. Please visit our website for the most recent revision of this datasheet.
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Rev. D 10/05

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